The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 2019

Filed:

Mar. 23, 2017
Applicant:

Htc Corporation, Taoyuan, TW;

Inventors:

Edward Chang, Taoyuan, TW;

Liang-Kang Huang, Taoyuan, TW;

Chih-Yang Chen, Taoyuan, TW;

Assignee:

HTC Corporation, Taoyuan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06T 19/00 (2011.01); G06F 3/01 (2006.01); G02B 27/01 (2006.01);
U.S. Cl.
CPC ...
G06T 19/006 (2013.01); G06F 3/012 (2013.01); G06F 3/013 (2013.01); G06F 3/017 (2013.01); G02B 27/017 (2013.01); G02B 2027/0138 (2013.01);
Abstract

An electronic apparatus includes a displayer, a graphic processing circuit, sensors and a control circuit. The displayer is configured for displaying a virtual reality scene or an augmented reality scene. The graphic processing circuit is coupled to the displayer. The graphic processing circuit is configured for computing a plurality of scene segments in the virtual reality scene or the augmented reality scene. The sensors are configured for collecting attention factors. The control circuit is coupled to the sensors and the graphic processing circuit. The control circuit is adapted to generate an attention map according to the attention factors. The attention map indicates priority rankings of the scene segments. The control circuit is further adapted to allocate a distribution of computational resources of the graphic processing circuit between the scene segments according to the priority rankings. The scene segments are computed differentially according to the distribution of computational resources.


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