The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 2019

Filed:

Aug. 15, 2016
Applicant:

Altera Corporation, San Jose, CA (US);

Inventors:

Doris Tzu-Lang Chen, Toronto, CA;

Deshanand Singh, Mississauga, CA;

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); H03K 19/177 (2006.01); H04L 12/24 (2006.01); H04L 12/931 (2013.01);
U.S. Cl.
CPC ...
G06F 17/505 (2013.01); G06F 17/5054 (2013.01); G06F 17/5077 (2013.01); G06F 17/5081 (2013.01); H03K 19/17736 (2013.01); H04L 41/0806 (2013.01); H04L 49/35 (2013.01); G06F 17/5068 (2013.01); G06F 2217/66 (2013.01); G06F 2217/78 (2013.01);
Abstract

A method of preparing a programmable integrated circuit device for configuration using a high-level language includes compiling a plurality of virtual programmable devices from descriptions in said high-level language. That compiling includes compiling configurations of configurable routing resources from programmable resources of said programmable integrated circuit device, and compiling configurations of a plurality of complex function blocks from programmable resources of said programmable integrated circuit device. A machine-readable data storage medium may be encoded with a library of such compiled configurations. A virtual programmable device may include a stall signal network and routing switches of the virtual programmable device may include stall signal inputs and outputs.


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