The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 2019

Filed:

Mar. 03, 2017
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

William Bakshi, Ramat Gan, IL;

Nabeel Achlaug, Kfar Kama, IL;

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2019.01); G06F 13/42 (2006.01); G06F 1/3287 (2019.01); G06F 13/40 (2006.01); G06F 1/324 (2019.01); G06F 1/3237 (2019.01); G06F 1/3234 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3287 (2013.01); G06F 1/324 (2013.01); G06F 1/3237 (2013.01); G06F 1/3253 (2013.01); G06F 13/4022 (2013.01); G06F 13/4291 (2013.01); G06F 13/4273 (2013.01); Y02D 10/14 (2018.01); Y02D 10/151 (2018.01);
Abstract

Asymmetric power states on a communication link are disclosed. In one aspect, the communication link is a Peripheral Component Interconnect (PCI) express (PCIe) link. PCIe is a point-to-point communication link between two termini. Exemplary aspects of the present disclosure allow the two termini to be in different power states. By allowing the two termini to be in the different power states, an individual terminus may be put into a low-power state even though the other terminus is maintained at a higher-power state. The different power states are enabled by providing switches between a reference clock and respective termini such that the reference clock may selectively be provided to only one terminus of the communication link, allowing that terminus to remain in the higher-power state while the other terminus enters a low-power state that does not require the reference clock.


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