The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 23, 2019

Filed:

Jun. 11, 2018
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventor:

Teruaki Kanzaki, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/06 (2006.01); H03K 21/02 (2006.01); H03K 3/012 (2006.01); G05F 1/56 (2006.01); G11C 8/10 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03K 3/012 (2013.01); G05F 1/56 (2013.01); G11C 8/10 (2013.01); H03K 21/026 (2013.01); H03K 2005/00078 (2013.01);
Abstract

An object of the present invention is to reduce burden on a program for changing an operation mode of an internal circuit in accordance with an internal clock frequency without mounting a large-scale circuit in an LSI in which setting of the frequency of an internal clock can be dynamically changed. In an LSI including an internal clock generation circuit generating an internal clock from a clock source in accordance with a parameter supplied, a register storing frequency information of the clock source, a register storing the parameter, and an internal circuit having a plurality of operation modes, a table circuit controlling the operation mode of the internal circuit in association with the frequency information and the parameter supplied from the registers is provided.


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