The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 23, 2019

Filed:

Sep. 12, 2018
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventor:

Joerg Erik Goller, Tiefenbach, DE;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/335 (2006.01); H02M 1/44 (2007.01); G06F 7/58 (2006.01); H02M 3/158 (2006.01); H04B 1/7075 (2011.01);
U.S. Cl.
CPC ...
H02M 1/44 (2013.01); G06F 7/584 (2013.01); H02M 3/1584 (2013.01); H04B 1/70756 (2013.01); H02M 2003/1586 (2013.01);
Abstract

An integrated circuit. The integrated circuit comprises a timebase generator and a switch mode direct current-to-direct current (DC-to-DC) voltage converter coupled to the timebase generator. The timebase generator comprises a first linear feedback shift register (LFSR), a signal generator having an input coupled to an output of the first LFSR; and a digital divider comprising a second LFSR and a programmable digital divider, wherein a clock input of the programmable digital divider is coupled to an output of the signal generator, wherein an output of the programmable digital divider is coupled to a clock input of the first LFSR and is coupled to a clock input of the second LFSR, and wherein an output of the second LFSR is coupled to a program input of the programmable digital divider.


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