The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 2019

Filed:

Aug. 13, 2018
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Varun Jain, San Diego, CA (US);

Brent Duckering, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/0185 (2006.01); H04W 52/02 (2009.01); H03K 19/003 (2006.01);
U.S. Cl.
CPC ...
H03K 19/018507 (2013.01); H03K 19/00346 (2013.01); H04W 52/028 (2013.01);
Abstract

An extended General Purpose Input/Output (eGPIO) scheme is disclosed. In some implementations, an input/output (I/O) boundary scan cell comprises an output path to route output signals from a first voltage domain and signals from a second voltage domain to an I/O pad operating in a pad voltage domain, the output path having a first level shifter to up shift the output signals from the first voltage domain or the second voltage domain to the pad voltage domain; an input path to receive input signals from the I/O pad, the input path having a second level shifter to down shift the input signals from the pad voltage domain to the second voltage domain; and test logic to test signals in the first voltage domain and the second voltage domain.


Find Patent Forward Citations

Loading…