The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 2019

Filed:

Apr. 20, 2018
Applicant:

University of Wyoming, Laramie, WY (US);

Inventors:

Dakota Roberson, Shelley, ID (US);

John F. O'Brien, Laramie, WY (US);

Assignee:

University of Wyoming, Laramie, WY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H02J 3/00 (2006.01); H02J 3/18 (2006.01); H02J 3/36 (2006.01); G01R 35/02 (2006.01);
U.S. Cl.
CPC ...
H02J 3/18 (2013.01); G01R 35/02 (2013.01); H02J 3/36 (2013.01);
Abstract

Disclosed are methods and systems for adjusting a High Voltage Direct Current (HVDC) compensator output signal to an HVDC system to reduce control loop modulus due to excessive time delay of sensor measurements. Two different time windows, a Short-Time Variance Window (STVW) and an Extended-Time Variance Window (ETVW) may be examined for detection of increased energy. To detect increased energy the HVDC compensator output signal may be passed through a bandpass filter, then variances for the STVW and ETVW may be generated to produce corresponding test statistics. The STVW and ETVW test statistics may be compared to hypothesis test thresholds and have binary logic based on the hypothesis test comparisons used to generate a gain. The gain may then be multiplied times the original HVDC feedback compensator output such that the adjusted HVDC feedback compensator output reduces the control loop modulus when applied to the HVDC system.


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