The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 2019

Filed:

Oct. 30, 2015
Applicant:

Silicon Laboratories Inc., Austin, TX (US);

Inventors:

Mohamed Elsayed, Austin, TX (US);

Matthew Powell, Austin, TX (US);

Nicholas M. Atkinson, Austin, TX (US);

Praveen Kallam, Austin, TX (US);

Assignee:

Silicon Laboratories Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02J 1/10 (2006.01); G06F 1/26 (2006.01); H03K 19/0185 (2006.01); G06F 1/28 (2006.01); G06F 1/30 (2006.01); H02J 1/00 (2006.01);
U.S. Cl.
CPC ...
H02J 1/10 (2013.01); G06F 1/26 (2013.01); G06F 1/28 (2013.01); G06F 1/305 (2013.01); H03K 19/0185 (2013.01); H02J 2001/008 (2013.01);
Abstract

Circuitry and methods are provided that may be implemented to transfer digital signals between multiple voltage domains while some of these domains may be invalid, e.g., such as to transfer a digital signal from a source voltage domain to a destination voltage domain while the voltage of the source domain is zero or invalid. Possible implementations include, but are not limited to, for power selection and distribution in an integrated circuit chip that has multiple power sources (e.g., such as main power supply and a backup power supply), and in which at startup the chip is agnostic of (or is not aware of) which power supply or power supplies is actually powered and available.


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