The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 2019

Filed:

Sep. 26, 2017
Applicant:

Sii Semiconductor Corporation, Chiba-shi, Chiba, JP;

Inventor:

Yukimasa Minami, Chiba, JP;

Assignee:

ABLIC INC., Chiba, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/66 (2006.01); H01L 27/02 (2006.01); H01L 29/861 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0626 (2013.01); H01L 27/0248 (2013.01); H01L 29/1045 (2013.01); H01L 29/66681 (2013.01); H01L 29/7816 (2013.01); H01L 29/7834 (2013.01); H01L 29/7835 (2013.01); H01L 29/861 (2013.01); H01L 29/1087 (2013.01); H01L 29/42368 (2013.01);
Abstract

In an ESD protection element configured to protect a semiconductor device, a first N-type low concentration diffusion layer is formed, as an offset layer for easing electric field concentration, under a LOCOS oxide film formed at each end of the gate electrode, and a second N-type low concentration diffusion layer and a third low concentration diffusion layer are formed under an N-type high concentration diffusion layer on the drain side to set the point of breakdown at a level deep inside a substrate from a surface of the substrate. The hold voltage is thus raised to a voltage equal to or higher than the operating voltage and a noise can be relieved without increasing the element size of the ESD protection element even when the noise having a large amount of positive electric charge is applied to a Vdd supply terminal.


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