The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 16, 2019
Filed:
Oct. 17, 2017
Applicant:
Xilinx, Inc., San Jose, CA (US);
Inventors:
Jindrich Zejda, Saratoga, CA (US);
Elliott Delaye, San Jose, CA (US);
Ashish Sirasao, San Jose, CA (US);
Yongjun Wu, Cupertino, CA (US);
Aaron Ng, San Jose, CA (US);
Assignee:
XILINX, INC., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01); G11C 16/10 (2006.01); G06N 3/04 (2006.01); G06F 12/06 (2006.01); G06F 13/16 (2006.01); G06N 20/00 (2019.01);
U.S. Cl.
CPC ...
G11C 16/102 (2013.01); G06F 12/0692 (2013.01); G06F 13/1673 (2013.01); G06N 3/04 (2013.01); G06N 20/00 (2019.01);
Abstract
Methods and apparatus are described for partitioning and reordering block-based matrix multiplications for high-speed data streaming in general matrix multiplication (GEMM), which may be implemented by a programmable integrated circuit (IC). By preloading and hierarchically caching the blocks, examples of the present disclosure reduce the double data rate (DDR) memory intake bandwidth for software-defined GEMM accelerators.