The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 2019

Filed:

Jun. 26, 2018
Applicant:

Origin Gps Ltd., Lod, IL;

Inventor:

Haim Goldberger, Modiin, IL;

Assignee:

ORIGIN GPS LTD., Lod, IL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01S 5/00 (2006.01); G06F 13/42 (2006.01); G05B 19/042 (2006.01); G05B 19/418 (2006.01); G01S 19/19 (2010.01); A63B 24/00 (2006.01); A63B 43/00 (2006.01); A63B 69/00 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4282 (2013.01); G01S 5/0027 (2013.01); G01S 19/19 (2013.01); G05B 19/0423 (2013.01); G05B 19/4185 (2013.01); A63B 24/0062 (2013.01); A63B 43/00 (2013.01); A63B 69/0002 (2013.01); A63B 2220/12 (2013.01); A63B 2220/30 (2013.01); A63B 2220/40 (2013.01); G05B 2219/25428 (2013.01); G06F 2213/0016 (2013.01);
Abstract

An integrated circuit for interfacing with one or more sensors including a wireless interface configured to connect to a network, an I/O interface configured to connect to sensors; and a microprocessor and memory that are programmed to: connect to a server via the network, wherein the server executes an application for controlling the sensors; transmit identification information and/or location information of the integrated circuit to the application executed by the server; receive commands for the sensors from the application executed by the server; and transfer the commands to the I/O interface for relaying to the sensors; and wherein the integrated circuit is configured to control any sensor that can connect electronically to the I/O interface without changing the programming of the microprocessor and memory.


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