The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 2019

Filed:

Mar. 09, 2018
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Tsutomu Fujita, Yokkaichi, JP;

Akira Tomono, Yokkaichi, JP;

Takanobu Ono, Kuwana, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); B23K 26/50 (2014.01); B23K 101/40 (2006.01);
U.S. Cl.
CPC ...
B23K 26/50 (2015.10); H01L 23/481 (2013.01); B23K 2101/40 (2018.08); H01L 2224/0401 (2013.01); H01L 2224/05005 (2013.01); H01L 2224/06181 (2013.01);
Abstract

A semiconductor device is provided with a semiconductor substrate. A semiconductor element is provided on a first face of the semiconductor substrate. An energy absorbing film is provided on the first face, to absorb optical energy to generate heat. A first insulation film is provided on the semiconductor element and on the energy absorbing film. A second insulation film is provided on a second face of the semiconductor substrate, the second face being opposite to the first face. A first modified layer is provided on a side face of the semiconductor substrate, the side face being located between an outer edge of the first face and an outer edge of the second face. A second modified layer is provided on the side face between the energy absorbing film and the first modified layer. A cleavage face is provided on the side face between the first and second modified layers.


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