The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 09, 2019
Filed:
Oct. 26, 2017
Perceptia Devices, Inc., Scotts Valley, CA (US);
André Grouwstra, Morgan Hill, CA (US);
Julian Jenkins, Kurraba Point, AU;
Perceptia IP Pty Ltd, Kurraba Point, NSW, AU;
Abstract
A phase-locked loop (PLL) has an oscillator, a counter and a register to sample the oscillator phase as an integer number. A phase predictor uses a fractional-N frequency control word (FCW) to calculate a predicted phase as an integer number. The integer difference between the sampled phase and the predicted phase is used as loop filter input, to generate an oscillator control signal that adjusts the oscillator frequency. The phase predictor may provide noise shaping, for example via a MASH modulator. A first sleep mode control signal blocks a reference clock and feedback of the oscillator clock to the counter. It may also freeze loop filter parameters and block the output clock. A second sleep mode control signal may stop the oscillator.