The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2019

Filed:

Jun. 06, 2018
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-Do, KR;

Inventors:

Hyunchul Hwang, Suwon-si, KR;

Minsu Kim, Hwaseong-si, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/00 (2006.01); G06F 1/3237 (2019.01);
U.S. Cl.
CPC ...
H03K 19/0016 (2013.01); G06F 1/3237 (2013.01); H03K 19/0013 (2013.01); Y02D 10/128 (2018.01);
Abstract

A clock gating circuit includes a first precharge unit charging a first node based on a clock signal, a second precharge unit charging a second node based on the clock signal, a first discharge unit discharging the first node based on the clock signal, a second discharge unit discharging the second node based on the clock signal, a first cross-coupled maintain unit maintaining the first node at a charge state according to a voltage level of the second node, a second cross-coupled maintain unit maintaining the second node at a charge state according to a voltage level of the first node, and a control unit controlling the first and second discharge units to discharge the first node or the second node on the basis of a clock enable signal.


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