The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2019

Filed:

Jan. 04, 2018
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Ayush Mittal, Bangalore, IN;

Krishnaswamy Thiagarajan, Bangalore, IN;

Bhushan Shanti Asuri, San Diego, CA (US);

Mahim Ranjan, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03D 7/12 (2006.01); H04B 1/40 (2015.01);
U.S. Cl.
CPC ...
H03D 7/125 (2013.01); H03D 2200/0086 (2013.01); H04B 1/40 (2013.01);
Abstract

An apparatus is disclosed for mixer biasing with baseband filter common-mode voltage. In an example aspect, the apparatus includes a mixer, a baseband filter, and a bias circuit. The mixer has a mixer transistor that is coupled to a bias node and a baseband node. The baseband filter is coupled to the mixer via the baseband node. The baseband filter is configured to operate with a common-mode reference voltage that is associated with a common-mode voltage applied at the baseband node. The bias circuit is coupled to the baseband filter and the bias node. The bias circuit is configured to receive the common-mode reference voltage from the baseband filter and generate, at the bias node, a bias voltage for biasing the mixer transistor based on the common-mode reference voltage.


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