The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2019

Filed:

Aug. 10, 2016
Applicant:

Server Technology, Inc., Reno, NV (US);

Inventors:

Carrel W. Ewing, Reno, NV (US);

Andrew J. Cleveland, Reno, NV (US);

James P. Maskaly, Reno, NV (US);

Assignee:

Server Technology, Inc., Reno, NV (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/18 (2006.01); H02B 1/06 (2006.01); H01R 25/00 (2006.01); H05K 1/02 (2006.01); H05K 1/14 (2006.01); H02B 1/015 (2006.01); H05K 1/11 (2006.01); H05K 13/00 (2006.01); H05K 5/00 (2006.01); H05K 5/02 (2006.01);
U.S. Cl.
CPC ...
H02B 1/06 (2013.01); G06F 1/189 (2013.01); H01R 25/006 (2013.01); H02B 1/015 (2013.01); H05K 1/0262 (2013.01); H05K 1/0298 (2013.01); H05K 1/115 (2013.01); H05K 1/144 (2013.01); H05K 5/0026 (2013.01); H05K 5/0247 (2013.01); H05K 13/00 (2013.01); H05K 2201/042 (2013.01); Y10T 29/4913 (2015.01); Y10T 29/49117 (2015.01); Y10T 29/49139 (2015.01);
Abstract

Methods, systems, and apparatuses provide power from multiple input power sources to adjacent outputs efficiently and reliably. Aspects of the disclosure provide a power distribution unit (PDU) that includes a number of power outputs including first and second adjacent power outputs. The PDU includes a printed circuit board having a first conducting layer electrically interconnected to a first power input connection and the first power output, a second conducting layer that is at least partially above the first conducting layer and in facing relationship thereto. The second conducting layer is electrically insulated from the first conducting layer and electrically interconnected with a second power input connection and the second power output, the first and second power outputs thereby connected to different power inputs.


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