Image sensor having an interconnection covering a black pixel region surrounding an active pixel region

Abstract

An image sensor of reduced chip size includes a semiconductor substrate having an active pixel region in which a plurality of active pixels are disposed and a power delivery region in which a pad is disposed. A plurality of first transparent electrode layers is disposed over the semiconductor substrate, respectively corresponding to the plurality of active pixels. A second transparent electrode layer is integrally formed across the active pixels. An organic photoelectric layer is disposed between the plurality of first transparent electrode layers and the second transparent electrode layer. An interconnection layer is located at a level that is the same as or higher than an upper surface of the pad with respect to an upper main surface of the semiconductor substrate. The interconnection layer extends from the pad to the second transparent electrode layer, and includes a connector electrically connecting the pad and the second transparent electrode layer.