The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2019

Filed:

Jun. 27, 2018
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Atsushi Nishikizawa, Tokyo, JP;

Yuichi Yato, Gunma, JP;

Hiroi Oka, Gunma, JP;

Tadatoshi Danno, Tokyo, JP;

Hiroyuki Nakamura, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49513 (2013.01); H01L 21/4825 (2013.01); H01L 21/565 (2013.01); H01L 23/3114 (2013.01); H01L 23/4952 (2013.01); H01L 23/49562 (2013.01); H01L 23/49568 (2013.01); H01L 23/49575 (2013.01); H01L 24/06 (2013.01); H01L 23/3107 (2013.01); H01L 2224/05554 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/45144 (2013.01); H01L 2224/48137 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/83192 (2013.01); H01L 2224/92247 (2013.01); H01L 2924/181 (2013.01);
Abstract

In a resin sealing type semiconductor device, a semiconductor chip CPis mounted over a die pad DP having conductivity via a bonding member BDhaving insulation property, and a semiconductor chip CPis mounted over the die pad DP via a bonding member BDhaving conductivity. A first length of a portion, in a first side formed by an intersection of a first side surface and a second side surface of the semiconductor chip CP, covered with the bonding member BDis larger than a second length of a portion, in a second side formed by an intersection of a third side surface and a fourth side surface of the semiconductor chip CP, covered with the bonding member BD


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