The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 09, 2019
Filed:
May. 09, 2018
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-Do, KR;
Sangho Rha, Seongnam-si, KR;
Kyoung Hee Nam, Seoul, KR;
Jeonggil Lee, Hwaseong-si, KR;
Hyunseok Lim, Suwon-si, KR;
Seungjong Park, Seoul, KR;
Seulgi Bae, Yeosu-si, KR;
Jaejin Lee, Goyang-si, KR;
Kwangtae Hwang, Seoul, KR;
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Abstract
A semiconductor device includes a substrate, a first metal interconnection provided on a first region of the substrate, and a second metal interconnection provided on a second region of the substrate. A width of the second metal interconnection is greater than a width of the first metal interconnection. The first metal interconnection includes a metal pattern. The second metal interconnection includes a lower metal pattern having a concave surface at its top, an upper metal pattern disposed on the concave surface at the top of the lower metal pattern, and a first barrier pattern interposed between the lower metal pattern and the upper metal pattern. The metal interconnections are formed by a damascene process including deposition, reflow, metal implantation, and planarization processes.