The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 02, 2019

Filed:

Feb. 06, 2018
Applicant:

Megachips Corporation, Osaka, JP;

Inventors:

Abhishek Kumar Khare, Bangalore, IN;

Raghavendra R. G, Bangalore, IN;

Anil Chawda, Bangalore, IN;

Shubham Srivastava, Bangalore, IN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/16 (2006.01); H04L 25/03 (2006.01); H04L 12/26 (2006.01);
U.S. Cl.
CPC ...
H04L 25/03828 (2013.01); H04B 1/16 (2013.01); H04L 43/087 (2013.01);
Abstract

A high performance equalization method is disclosed for achieving low deterministic jitter across Process, Voltage and Temperature (PVT) for various channel lengths and data rates. The method includes receiving input signal at front end of a receiver upon passing through a channel, generating with an eye-opening monitor circuit a control code based on channel conditions, and equalizing with a continuous-time linear equalization equalizer (CTLE) circuit the input signal based on the control code such that the eye-opening monitor circuit and the CTLE circuit are biased based on their corresponding replica circuits, and the control code is generated in a feedforward configuration.


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