The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 02, 2019
Filed:
Feb. 27, 2018
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventors:
Jaiganesh Balakrishnan, Bangalore, IN;
Shagun Dusad, Bangalore, IN;
Visvesvaraya Pentakota, Bangalore, IN;
Srinivas Kumar Reddy Naru, Markapur, IN;
Sarma Sundareswara Gunturi, Bangalore, IN;
Nagalinga Swamy Basayya Aremallapur, Bangalore, IN;
Assignee:
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01); H03K 5/14 (2014.01); H03K 5/00 (2006.01); H04L 9/32 (2006.01);
U.S. Cl.
CPC ...
H04L 7/0037 (2013.01); H03K 5/14 (2013.01); H04L 7/0087 (2013.01); H03K 2005/00019 (2013.01); H04L 9/3247 (2013.01);
Abstract
A clock divider comprises a clock delay line that comprises a plurality of delay elements, a clock delay selector coupled to the clock delay line and configured to select one of the plurality of delay elements and a bit pattern source coupled to the clock delay selector. The clock delay line is configured to generate a modulated divided clock signal with a suppressed fundamental spectral component.