The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 02, 2019
Filed:
Apr. 06, 2018
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Luis Chen, Chula Vista, CA (US);
Jeffrey Mark Hinrichs, San Diego, CA (US);
Assignee:
QUALCOMM Incorporated, San Diego, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 1/02 (2006.01); H03L 7/099 (2006.01); H03B 5/04 (2006.01); H03B 5/12 (2006.01);
U.S. Cl.
CPC ...
H03L 1/023 (2013.01); H03B 5/04 (2013.01); H03B 5/1215 (2013.01); H03B 5/1228 (2013.01); H03B 5/1231 (2013.01); H03B 5/1243 (2013.01); H03B 5/1253 (2013.01); H03B 5/1265 (2013.01); H03B 5/1293 (2013.01); H03L 7/099 (2013.01);
Abstract
A bias circuit is provided that is configure to control the bias for a diode-connected transistor operating in the sub-threshold region to produce a gate-to-source voltage. A differential tuning voltage derived from the gate-to-source voltage tunes a plurality of varactors.