The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 02, 2019
Filed:
Jan. 07, 2016
Applicant:
Mitsubishi Electric Corporation, Tokyo, JP;
Inventor:
Kentaro Yoshida, Tokyo, JP;
Assignee:
Mitsubishi Electric Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/0812 (2006.01); H02M 1/08 (2006.01); H03K 17/16 (2006.01); H03K 17/687 (2006.01); H03K 17/74 (2006.01); H03K 17/567 (2006.01); H02M 1/44 (2007.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H03K 17/08128 (2013.01); H02M 1/08 (2013.01); H03K 17/162 (2013.01); H03K 17/168 (2013.01); H03K 17/567 (2013.01); H03K 17/6877 (2013.01); H03K 17/74 (2013.01); H02M 1/44 (2013.01); H02M 2001/0054 (2013.01); H03K 17/163 (2013.01); Y02B 70/1491 (2013.01);
Abstract
Provided is a technique for a stably operable complementary single ended push pull (SEPP) circuit. A buffer circuit includes the following: an NPN transistor and a PNP transistor that constitute a complementary SEPP circuit; a first resistor; a second resistor; a first load element having one end connected to a gate of a semiconductor switching element and another end connected to a base of the NPN transistor; and a second load element having one end connected to the gate of the semiconductor switching element and another end connected to a base of the PNP transistor.