The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 02, 2019

Filed:

Dec. 22, 2016
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Amrinder S. Barn, San Jose, CA (US);

Bo Zhao, Cupertino, CA (US);

Michael A. Dreesen, Austin, TX (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); H03F 3/45 (2006.01); H03K 3/00 (2006.01); H03K 3/356 (2006.01); H03K 19/0175 (2006.01); G11C 29/32 (2006.01); G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
H03K 3/356104 (2013.01); G11C 29/32 (2013.01); H03K 3/356121 (2013.01); H03K 19/017509 (2013.01); G11C 7/106 (2013.01); G11C 2029/3202 (2013.01);
Abstract

In an embodiment, an apparatus includes a first latch including a true storage node and a complement storage node, a discharge circuit, and a second latch. The first latch may pre-charge the true storage node and the complement storage node to a first voltage level using a clock signal. The discharge circuit may, in response to a determination that a scan mode signal is asserted, selectively discharge either the true storage node or the complement storage node based on a value of a scan data signal, and otherwise may selectively discharge either the true storage node or the complement storage node based on a value of a data signal. The second latch may store a value of a data bit based on a voltage level of the true storage node and a voltage level of the complement storage node.


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