The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 02, 2019
Filed:
Jun. 23, 2017
Applicant:
Xilinx, Inc., San Jose, CA (US);
Inventor:
Ilya K. Ganusov, San Jose, CA (US);
Assignee:
XILINX, INC., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/037 (2006.01); H03K 3/289 (2006.01); H03K 3/356 (2006.01); H03K 5/135 (2006.01); H03K 19/173 (2006.01);
U.S. Cl.
CPC ...
H03K 3/0372 (2013.01); H03K 3/289 (2013.01); H03K 3/356052 (2013.01); H03K 5/135 (2013.01); H03K 19/1733 (2013.01);
Abstract
The disclosed pulsed latched circuitry includes first and second latch circuits. The first and second latch circuits can be provided with additional logic circuit components to permit them to be operated as a flip-flop circuit, or as a FIFO circuit with a depth of two.
Ganusov, Ilya. (2019). Configurable latch circuit (U.S. Patent No. 10340898). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10340898
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile