The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 02, 2019

Filed:

Sep. 13, 2017
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventor:

Bartlomiej Jan Pawlak, Leuven, BE;

Assignee:

GLOBALFOUNDRIES Inc., Grand Cayman, KY;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/165 (2006.01); H01L 29/205 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 29/739 (2006.01); H01L 29/417 (2006.01); H01L 29/267 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66977 (2013.01); H01L 29/083 (2013.01); H01L 29/0834 (2013.01); H01L 29/0847 (2013.01); H01L 29/1037 (2013.01); H01L 29/165 (2013.01); H01L 29/205 (2013.01); H01L 29/66356 (2013.01); H01L 29/66522 (2013.01); H01L 29/66545 (2013.01); H01L 29/66666 (2013.01); H01L 29/7391 (2013.01); H01L 29/7827 (2013.01); H01L 29/7848 (2013.01); H01L 21/823418 (2013.01); H01L 29/267 (2013.01); H01L 29/41783 (2013.01); H01L 29/785 (2013.01);
Abstract

A tunneling field effect transistor device disclosed herein includes a substrate, a body comprised of a first semiconductor material being doped with a first type of dopant material positioned above the substrate, and a second semiconductor material positioned above at least a portion of the gate region and above the source region. The first semiconductor material is part of the drain region, and the second semiconductor material defines the channel region. The device also includes a third semiconductor material positioned above the second semiconductor material and above at least a portion of the gate region and above the source region. The third semiconductor material is part of the source region, and is doped with a second type of dopant material that is opposite to the first type of dopant material. A gate structure is positioned above the first, second and third semiconductor materials in the gate region.


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