The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 02, 2019

Filed:

Jan. 11, 2018
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-Do, KR;

Inventors:

Seul Ki Hong, Seoul, KR;

Heon Jong Shin, Yongin-si, KR;

Hwi Chan Jun, Yongin-si, KR;

Min Chan Gwak, Hwaseong-si, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Suwon-si, Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/321 (2006.01); H01L 23/485 (2006.01); H01L 21/3213 (2006.01); H01L 29/06 (2006.01); H01L 29/78 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01); H01L 23/535 (2006.01); H01L 27/088 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); H01L 21/32115 (2013.01); H01L 21/32137 (2013.01); H01L 23/485 (2013.01); H01L 23/535 (2013.01); H01L 23/53261 (2013.01); H01L 27/0886 (2013.01); H01L 29/0649 (2013.01); H01L 29/66545 (2013.01); H01L 29/7851 (2013.01); H01L 23/53257 (2013.01); H01L 23/53295 (2013.01);
Abstract

A semiconductor device includes a substrate having a device isolation region defining an active region. An active fin is positioned in the active region. A gate structure overlaps the active fin along a direction orthogonal to an upper surface of the substrate and extends in a second direction intersecting the first direction. A source/drain region is disposed on the active fin. A contact plug is connected to the source/drain region and overlaps the active fin. A metal via is positioned at a first level above the substrate higher than an upper surface of the contact plug and spaced apart from the active fin. A metal line is positioned at a second level above the substrate, higher than the first level and connected to the metal via. A via connection layer extends from an upper portion of the contact plug and is connected to the metal via.


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