The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 02, 2019
Filed:
Jun. 14, 2017
Hitachi, Ltd., Chiyoda-ku, Tokyo, JP;
Takumi Uezono, Tokyo, JP;
Tadanobu Toba, Tokyo, JP;
Yusuke Kanno, Tokyo, JP;
Masahiro Shiraishi, Tokyo, JP;
Hideo Harada, Tokyo, JP;
Satoshi Nishikawa, Tokyo, JP;
Toru Motoya, Tokyo, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
Provided is a technology capable of reducing the number of resources necessary for logic implementation in a control device. A semiconductor LSI design device generates a combinational circuit configured with functional blocks defined by a functional block library from an application specification, allocates an operation order of each functional block in the combinational circuit under a condition for starting an operation of a functional block connected to an input pin after ending the operation, converts into a sequence circuit which uses the functional block twice or more in a time division manner, extracts the operation order at a time of execution of the sequential circuit, and determines whether the operation order allocated to the combinational circuit coincide with the extracted operation execution order.