The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 02, 2019
Filed:
Dec. 11, 2015
Proplus Design Solutions, Inc., San Jose, CA (US);
Bruce W. McGaughy, Pleasanton, CA (US);
Yutao Ma, San Jose, CA (US);
Other;
Abstract
Methods and systems are disclosed for determining a yield of a circuit in semiconductor manufacturing. In one embodiment, a computer implemented method includes performing a first pass of Monte Carlo simulations of the circuit to identify a plurality of failed sampling points in a high sigma region of a statistical distribution, partitioning the plurality of failed sampling points into a plurality of clusters based on angular separation of the plurality of failed sampling points, determining a boundary of each cluster in the plurality of clusters, performing sensitivity analysis from the boundary of the each cluster to identify an estimated closest failed sampling point associated with the each cluster, and performing a second pass of Monte Carlo simulations of the circuit to determine the yield of the circuit using the estimated closest failed sampling point associated with the each cluster and the boundary of each cluster in the plurality of clusters.