The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 02, 2019

Filed:

Apr. 07, 2017
Applicant:

Huawei Technologies Co., Ltd., Shenzhen, CN;

Inventors:

Shaola Yang, Hangzhou, CN;

Xiaocheng Liu, Hangzhou, CN;

Zhen Xu, Hangzhou, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 9/46 (2006.01); G06F 15/80 (2006.01);
U.S. Cl.
CPC ...
G06F 9/30036 (2013.01); G06F 9/3001 (2013.01); G06F 9/30145 (2013.01); G06F 9/3836 (2013.01); G06F 9/3871 (2013.01); G06F 9/3885 (2013.01); G06F 9/46 (2013.01); G06F 15/8092 (2013.01);
Abstract

An asynchronous instruction execution apparatus and method are provided. The asynchronous instruction execution apparatus includes a vector execution unit control VXUC module and n vector execution unit data VXUD modules, where n is a positive integer. The VXUC module is configured to perform instruction decoding and token management. The n VXUD modules are cascaded, separately connected to the VXUC module, and configured to invoke an external calculation resource to perform data calculation. A bit width of data processed by the asynchronous instruction execution apparatus is M, a bit width of each VXUD module is N, and n=M/N. The asynchronous instruction execution apparatus is divided into two parts: the VXUC and the VXUD.


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