The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2019

Filed:

Feb. 22, 2018
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

William V. Huott, Holmes, NY (US);

Chandrasekharan Kothandaraman, New York, NY (US);

Adam J. McPadden, Underhill, VT (US);

Uma Srinivasan, Poughkeepsie, NY (US);

Stephen Wu, Poughkeepsie, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/419 (2006.01); G11C 29/12 (2006.01); G11C 29/50 (2006.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01); G11C 29/12 (2013.01); G11C 29/50 (2013.01);
Abstract

Embodiments of the present invention provide systems and methods for re-balancing the stability of a SRAM cell. Embodiments of the present invention identify SRAM cells with negative voltage threshold margins and write a 'zero' state bit with in the bi-stable flip-flop of the SRAM. Raising the voltage of the CMOS set containing the 'zero' state bit and selective transistor biasing, skews the “zero” state bit towards the complementary “one” state bit. This induces an increase voltage thresholds of the identified SRAM cells.


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