The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 25, 2019
Filed:
Mar. 09, 2018
Applicant:
Toshiba Memory Corporation, Minato-ku, JP;
Inventors:
Keiji Ikeda, Kawasaki, JP;
Chika Tanaka, Fujisawa, JP;
Toshinori Numata, Kamakura, JP;
Tsutomu Tezuka, Yokohama, JP;
Assignee:
Toshiba Memory Corporation, Minato-ku, JP;
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 11/406 (2006.01); G11C 11/4094 (2006.01); G11C 11/403 (2006.01); G11C 11/408 (2006.01);
U.S. Cl.
CPC ...
G11C 11/40607 (2013.01); G11C 11/403 (2013.01); G11C 11/4085 (2013.01); G11C 11/4094 (2013.01); G11C 11/40615 (2013.01); G11C 11/40622 (2013.01); G11C 2207/2245 (2013.01);
Abstract
According to one embodiment, a semiconductor memory device includes a first memory cell including a first transistor and a first capacitor, a second memory cell including a second transistor and a second capacitor, a first word line electrically coupled to the first transistor, a second word line electrically coupled to the second transistor, and a first circuit which supplies a first voltage to the first word line, and a second voltage different from the first voltage to the second word line, during a sleep mode.