The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 25, 2019
Filed:
Nov. 17, 2016
Applicant:
Xilinx, Inc., San Jose, CA (US);
Inventors:
Jennifer D. McEwen, Boulder, CO (US);
Ian L. McEwen, Boulder, CO (US);
Chong M. Lee, Broomfield, CO (US);
Bart Reynolds, Manzanita, OR (US);
Assignee:
XILINX, INC., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06T 11/20 (2006.01); G06T 11/60 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5072 (2013.01); G06F 17/5081 (2013.01); G06T 11/20 (2013.01); G06T 11/60 (2013.01); G06T 2207/20021 (2013.01); G06T 2207/30148 (2013.01);
Abstract
Rendering a graphical representation of an integrated circuit can include determining, using a processor, a tile of a device model at least partially within a viewport, determining, using the processor, an owning tile having a fly-over wire passing over the tile, determining, using the processor, a predetermined shape of the fly-over wire, and drawing, using the processor, the fly-over wire within the viewport based upon the shape.