The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2019

Filed:

Dec. 15, 2016
Applicant:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Inventors:

Betty Ann McDaniel, Austin, TX (US);

Michael D. Achenbach, Austin, TX (US);

David N. Suggs, Austin, TX (US);

Frank C. Galloway, Austin, TX (US);

Kai Troester, Boxborough, MA (US);

Krishnan V. Ramani, Sunnyvale, CA (US);

Assignee:

ADVANCED MICRO DEVICES, INC., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/0871 (2016.01); G06F 12/0897 (2016.01); G06F 9/30 (2018.01);
U.S. Cl.
CPC ...
G06F 3/0611 (2013.01); G06F 3/0631 (2013.01); G06F 3/0643 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G06F 9/30 (2013.01); G06F 12/0871 (2013.01); G06F 12/0897 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/304 (2013.01); G06F 2212/463 (2013.01); G06F 2212/604 (2013.01);
Abstract

A system and method for tracking stores and loads to reduce load latency when forming the same memory address by bypassing a load store unit within an execution unit is disclosed. The system and method include storing data in one or more memory dependent architectural register numbers (MdArns), allocating the one or more MdArns to a MEMFILE, writing the allocated one or more MdArns to a map file, wherein the map file contains a MdArn map to enable subsequent access to an entry in the MEMFILE, upon receipt of a load request, checking a base, an index, a displacement and a match/hit via the map file to identify an entry in the MEMFILE and an associated store, and on a hit, providing the entry responsive to the load request from the one or more MdArns.


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