The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2019

Filed:

Apr. 06, 2018
Applicant:

Dialog Semiconductor (Uk) Limited, London, GB;

Inventors:

Mihail Jefremow, Augsburg, DE;

Dan Ciomaga, Ingolstadt, DE;

Gennadii Tatarchenkov, Germering, DE;

Stephan Drebinger, Munich, DE;

Fabio Rigoni, Karlsfeld, DE;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/575 (2006.01); G05F 1/565 (2006.01); G05F 1/10 (2006.01);
U.S. Cl.
CPC ...
G05F 1/575 (2013.01); G05F 1/565 (2013.01); G05F 1/10 (2013.01);
Abstract

A circuit for generating an output voltage, and regulating the output voltage to a target voltage, is described. The circuit comprises a pass device coupled between an input voltage level and an output voltage level, an error amplifier stage configured to generate a first control voltage on the basis of a reference voltage and the output voltage, a buffer stage configured to generate a drive signal for the pass device on the basis of the first control voltage, and a tracking circuit configured to track a voltage across the pass device and to generate a second control voltage on the basis of the voltage across the pass device. The buffer stage comprises a variable resistance element, for limiting a current flowing through the buffer stage on the basis of the second control voltage.


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