The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2019

Filed:

Mar. 27, 2018
Applicant:

AU Optronics Corporation, Hsinchu, TW;

Inventors:

Hsiu-Chun Hsieh, Hsinchu, TW;

Yi-Wei Chen, Hsinchu County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); G02F 1/1368 (2006.01); G02F 1/1362 (2006.01); H01L 29/786 (2006.01); G02F 1/136 (2006.01); G02F 1/1343 (2006.01);
U.S. Cl.
CPC ...
G02F 1/1368 (2013.01); G02F 1/13624 (2013.01); G02F 1/136286 (2013.01); H01L 27/124 (2013.01); H01L 27/1222 (2013.01); H01L 27/1255 (2013.01); H01L 29/78645 (2013.01); G02F 1/134363 (2013.01); G02F 2001/13606 (2013.01); G02F 2001/13685 (2013.01); G02F 2001/134372 (2013.01); G02F 2202/104 (2013.01);
Abstract

A pixel array substrate including a plurality of pixel units disposed on a substrate is provided. Each of the pixel units includes a scan line, a data line and an active element. The active element includes a semiconductor layer, a gate, a source electrode and a drain electrode. The semiconductor layer has a channel region, a source region, a drain region, a first connection region and a second connection region. The first connection region is connected between the channel region and the source region. The second connection region is connected between the channel region and the drain region. A normal projection of the first connection region on the substrate and a normal projection of the second connection region on the substrate are respectively located at two opposite sides of a normal projection of the data line on the substrate.


Find Patent Forward Citations

Hsieh, Hsiu-Chun. (2019). Pixel array substrate (U.S. Patent No. 10331002). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10331002

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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