The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 18, 2019

Filed:

Jan. 16, 2018
Applicant:

Omnivision Technologies, Inc., Santa Clara, CA (US);

Inventors:

Yingkan Lin, San Jose, CA (US);

Charles Wu, Palo Alto, CA (US);

Yu-Shen Yang, San Jose, CA (US);

Assignee:

OmniVision Technologies, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 5/378 (2011.01); H04N 5/369 (2011.01); H04N 5/3745 (2011.01); H04N 5/376 (2011.01);
U.S. Cl.
CPC ...
H04N 5/3698 (2013.01); H04N 5/378 (2013.01); H04N 5/3765 (2013.01); H04N 5/37455 (2013.01);
Abstract

A readout circuit for use with an image sensor includes a comparator coupled to compare a ramp signal from a ramp generator with an output signal from a pixel of a pixel array. A counter is coupled to the comparator to count until the comparator detects that a ramp signal value has reached an output signal value. The counter includes K cascade-coupled dynamic flip-flop circuits to generate the K least significant bits (LSBs) of the N-bit output of the counter. The counter also includes N-K cascade-coupled static flip-flop circuits to generate the N-K most significant bits (MSBs) of the N-bit output of the counter. A latch is coupled to the counter to store a count value generated by the counter after the ramp signal value has reached the output signal value.


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