The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 18, 2019
Filed:
Nov. 20, 2017
Tsinghua University, Beijing, CN;
Hon Hai Precision Industry Co., Ltd., New Taipei, TW;
Yu-Dan Zhao, Beijing, CN;
Yu-Jia Huo, Beijing, CN;
Xiao-Yang Xiao, Beijing, CN;
Ying-Cheng Wang, Beijing, CN;
Tian-Fu Zhang, Beijing, CN;
Yuan-Hao Jin, Beijing, CN;
Qun-Qing Li, Beijing, CN;
Shou-Shan Fan, Beijing, CN;
Tsinghua University, Beijing, CN;
HON HAI PRECISION INDUSTRY CO., LTD., New Taipei, TW;
Abstract
The disclosure relates to a logic circuit. The logic circuit includes a n-type thin film transistor and a p-type thin film transistor. Each thin film transistor includes a substrate; a semiconductor layer including nano-scaled semiconductor materials; a source and a drain, wherein the source and the drain are spaced apart from each other, and electrically connected to the semiconductor layer; a dielectric layer covering the semiconductor layer, wherein the dielectric layer includes a normal dielectric layer and an abnormal dielectric layer stacked on one another, and the abnormal dielectric layer is an oxide dielectric layer grown by magnetron sputtering; and a gate in direct contact with the abnormal dielectric layer. The n-type thin film transistor and the p-type thin film transistor share the same substrate and the same gate.