The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 18, 2019
Filed:
Dec. 12, 2016
Boe Technology Group Co., Ltd., Beijing, CN;
Ordos Yuansheng Optoelectronics Co., Ltd., Ordos, CN;
Chaochao Sun, Beijing, CN;
Chao Wang, Beijing, CN;
Huafeng Liu, Beijing, CN;
Shengwei Zhao, Beijing, CN;
Bule Shun, Beijing, CN;
Lei Yang, Beijing, CN;
Chongliang Hu, Beijing, CN;
Meng Yang, Beijing, CN;
Jingping Lv, Beijing, CN;
Lin Xie, Beijing, CN;
Shimin Sun, Beijing, CN;
Duolong Ding, Beijing, CN;
BOE TECHNOLOGY GROUP CO., LTD., Beijing, CN;
Ordos Yuansheng Optoelectronics Co., Ltd., Ordos, CN;
Abstract
The present application discloses a method of fabricating a thin film transistor, including forming a semiconductor layer having a pattern corresponding to that of the active layer on a base substrate; forming a first photoresist layer on a side of the semiconductor layer distal to the base substrate; the first photoresist layer being in an area corresponding to the channel region, the second doped region, and the fourth doped region; doping a region of the semiconductor layer corresponding to the first doped region and the third doped region using the first photoresist layer as a mask plate; forming a second photoresist layer by removing a portion of the first photoresist layer to expose an initial portion of the semiconductor layer corresponding to at least a portion of the second doped region and at least a portion of the fourth doped region; and doping the initial portion of the semiconductor layer using the second photoresist layer as a mask plate.