The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 18, 2019
Filed:
Feb. 11, 2016
Applicant:
Dongbu Hitek Co., Ltd., Seoul, KR;
Inventor:
Yong Soo Cho, Daejeon, KR;
Assignee:
DB Hitek Co., Ltd, Seoul, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/66 (2006.01); H01L 27/088 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 21/8234 (2006.01); H01L 29/10 (2006.01); H01L 21/84 (2006.01); H01L 21/761 (2006.01); H01L 27/12 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 23/66 (2013.01); H01L 21/761 (2013.01); H01L 21/823493 (2013.01); H01L 21/84 (2013.01); H01L 27/088 (2013.01); H01L 27/1203 (2013.01); H01L 29/1083 (2013.01); H01L 29/1087 (2013.01); H01L 29/0692 (2013.01); H01L 29/78 (2013.01);
Abstract
A semiconductor device includes a high resistivity substrate, a transistor formed on the high resistivity substrate, and a deep trench device isolation region formed in the high resistivity substrate to surround the transistor. Particularly, the high resistivity substrate has a first conductive type, and a deep well region having a second conductive type is formed in the high resistivity substrate. Further, a low concentration well region having the first conductive type is formed on the deep well region, and the transistor is formed on the low concentration well region.