The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 18, 2019

Filed:

Aug. 24, 2017
Applicant:

Ningbo University, Zhejiang, CN;

Inventors:

Pengjun Wang, Zhejiang, CN;

Daohui Gong, Zhejiang, CN;

Yaopeng Kang, Zhejiang, CN;

Huihong Zhang, Zhejiang, CN;

Assignee:

Ningbo University, Zhejiang, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/419 (2006.01); G11C 11/412 (2006.01); G11C 7/06 (2006.01); H01L 27/28 (2006.01); H01L 51/05 (2006.01); H01L 51/00 (2006.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01); G11C 7/065 (2013.01); G11C 11/412 (2013.01); H01L 27/283 (2013.01); H01L 51/0048 (2013.01); H01L 51/0558 (2013.01);
Abstract

A ternary sense amplifier and an SRAM array realized by the ternary sense amplifier are provided. The ternary sense amplifier comprises the 1CNFET transistor, the 2CNFET transistor, the 3CNFET transistor, the 4CNFET transistor, the 5CNFET transistor, the 6CNFET transistor, the 7CNFET transistor, the 8CNFET transistor, the 9CNFET transistor, the 10CNFET transistor, the 11CNFET transistor, the 12CNFET transistor and the 13CNFET transistor; the SRAM array comprises a ternary sense amplifier, a ternary memory array, the 1inverter, the 2inverter, the 3inverter, the 4inverter, the 14CNFET transistor, the 15CNFET transistor, the 16CNFET transistor, the 17CNFET transistor, the 18CNFET transistor and the 19CNFET transistor; it features in low power consumption, less postponement and high yield of chips.


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