The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 18, 2019

Filed:

Nov. 20, 2017
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Daniel Wilson, San Francisco, CA (US);

Anand Dalal, San Jose, CA (US);

Josh De Cesare, Campbell, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/17 (2006.01); G06F 15/173 (2006.01); G06F 13/42 (2006.01); G06F 1/3287 (2019.01); G06F 13/364 (2006.01);
U.S. Cl.
CPC ...
G06F 15/17362 (2013.01); G06F 1/3287 (2013.01); G06F 13/364 (2013.01); G06F 13/4282 (2013.01); G06F 13/4295 (2013.01); Y02D 10/151 (2018.01); Y02D 10/171 (2018.01); Y02D 50/20 (2018.01);
Abstract

Methods and apparatus for managing connections between multiple internal integrated circuits (ICs) of, for example, a high-speed internal device interface. Improved schemes for coordination of connection and disconnection events, and/or suspension and resumption of operation for a High-Speed Inter-Chip™ (HSIC) interface are disclosed. In one exemplary embodiment, a 'device'-initiated and 'host'-initiated connect/disconnect procedure is disclosed, that provides improved timing, synchronization, and power consumption.


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