The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 18, 2019

Filed:

Oct. 12, 2017
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Arnold Flores, Round Rock, TX (US);

Bruce G. Mealey, Austin, TX (US);

Mark D. Rogers, Round Rock, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/10 (2016.01); G06F 12/02 (2006.01); G06F 12/1045 (2016.01); G06F 12/14 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0292 (2013.01); G06F 12/1054 (2013.01); G06F 12/145 (2013.01); G06F 2212/151 (2013.01); G06F 2212/683 (2013.01);
Abstract

Systems, methods, and computer program products to manage an address translation in a virtually segmented memory system, with included processes comprising a process scoped segment table (STAB) consisting of segment table entries (STEs) that contain effective address segment number (ESID) to system wide unique virtual segment identifier (VSID) mappings, and creating a global kernel segment table (STAB) that itself is translated using a pinned page table entry (PTE). A switch to the global kernel STAB is initiated in response to a page fault interrupt on a process STAB PTE and a PTE reload handler invoked to reload that process STAB PTE. A switch to an original STAB is initiated in order to resume the address translation and resolve the page fault or the interrupt by an operating system executing on the processor.


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