The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 18, 2019
Filed:
Dec. 11, 2017
Massachusetts Institute of Technology, Cambridge, MA (US);
National University of Singapore, Singapore, SG;
Nanyang Technological University, Singapore, SG;
Wenjia Zhang, Shanghai, CN;
Bing Wang, Singapore, SG;
Li Zhang, Singapore, SG;
Zhaomin Zhu, Singapore, SG;
Jurgen Michel, Cambridge, MA (US);
Soo-Jin Chua, Singapore, SG;
Li-Shiuan Peh, Singapore, SG;
Siau Ben Chiah, Singapore, SG;
Eng Kian Kenneth Lee, Singapore, SG;
Massachusetts Institute of Technology, Cambridge, MA (US);
National University of Singapore, Singapore, SG;
Nanyang Technological University, Singapore, SG;
Abstract
A method of forming an integrated circuit is disclosed. The method includes: (i) forming at least a pair of optoelectronic devices from at least a first wafer material arranged on a semiconductor substrate, the first wafer material different to silicon; (ii) etching the first wafer material to form a first recess to be filled with a second material; (iii) processing the second material to form a waveguide for coupling the pair of optoelectronic devices to define an optical interconnect; and (iv) bonding at least one partially processed CMOS device layer having at least one transistor to the second semiconductor substrate to form the integrated circuit, the partially processed CMOS device layer arranged adjacent to the optical interconnect. An integrated circuit is also disclosed.