The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 18, 2019

Filed:

Nov. 21, 2017
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Hisao Kobashi, Kodaira, JP;

Yasuhiko Fukushima, Kodaira, JP;

Mikio Asai, Kodaira, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G01R 31/26 (2014.01); G06F 3/06 (2006.01); G11C 11/419 (2006.01); G11C 29/12 (2006.01); G11C 29/46 (2006.01); G11C 29/50 (2006.01); G11C 29/04 (2006.01); G11C 29/36 (2006.01); G11C 29/44 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2642 (2013.01); G06F 3/0614 (2013.01); G06F 3/0653 (2013.01); G06F 3/0679 (2013.01); G11C 11/419 (2013.01); G11C 29/12 (2013.01); G11C 29/12005 (2013.01); G11C 29/46 (2013.01); G11C 29/50016 (2013.01); G11C 2029/0403 (2013.01); G11C 2029/0407 (2013.01); G11C 2029/3602 (2013.01); G11C 2029/4402 (2013.01); G11C 2029/5004 (2013.01);
Abstract

A semiconductor device includes a logic circuit, a memory circuit having a plurality of first static memory cells formed by a transistor on the semiconductor substrate, a monitor circuit having a second static memory cell formed by a transistor on the semiconductor substrate, the monitor circuit being configured to apply stress to the second static memory cell during a period in which the semiconductor device operates so that a state of the second static memory cell can be notified, and a bus coupled with the logic circuit, the memory circuit and the monitor circuit, wherein a size of the transistor of one cell of the first static memory cells is substantively the same as that of the transistor of the second static memory cell.


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