The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2019

Filed:

Oct. 31, 2017
Applicant:

Marvell World Trade Ltd., St. Michael, BB;

Inventors:

Runzi Chang, San Jose, CA (US);

Winston Lee, Palo Alto, CA (US);

Peter Lee, Pleasanton, CA (US);

Assignee:

Marvell World Trade Ltd., St. Michael, BB;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 17/18 (2006.01); H01L 21/02 (2006.01); H01L 21/027 (2006.01); H01L 21/311 (2006.01); H01L 27/112 (2006.01); H01L 29/423 (2006.01); G11C 17/16 (2006.01); H01L 23/525 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11206 (2013.01); G11C 17/165 (2013.01); G11C 17/18 (2013.01); H01L 21/0274 (2013.01); H01L 21/02164 (2013.01); H01L 21/02271 (2013.01); H01L 21/31111 (2013.01); H01L 23/5252 (2013.01); H01L 29/42364 (2013.01); H01L 21/0214 (2013.01); H01L 21/0217 (2013.01);
Abstract

The present disclosure describes apparatuses and methods for manufacturing programmable memory devices with optimized gate oxide thickness. In some aspects, lithography masks are used to fabricate oxide gates for programmable memory devices of an integrated-circuit (IC) die that are thinner than oxide gates fabricated for processor core devices of the IC die. In other aspects, lithography masks are used to fabricate oxide gates for the programmable memory devices of the IC die such that they are thicker than the oxide gates fabricated for the processor core devices of the IC die. By so doing, the programmable memory devices can be manufactured with optimized gate oxide thickness that may reduce programming voltage or increase device reliability of the programmable memory devices.


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