The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 11, 2019
Filed:
Aug. 14, 2013
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventors:
Thomas Kern, Munich, DE;
Jens Rosenbusch, Munich, DE;
Ulrich Backhausen, Taufkirchen, DE;
Thomas Nirschl, Putzbrunn, DE;
Assignee:
Infineon Technologies AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/50 (2006.01); G11C 16/34 (2006.01); G06F 11/16 (2006.01); G11B 20/18 (2006.01); G06F 11/10 (2006.01); G11C 29/02 (2006.01); G11C 29/42 (2006.01); G11C 29/52 (2006.01); G11C 16/28 (2006.01);
U.S. Cl.
CPC ...
G11C 29/50004 (2013.01); G06F 11/1048 (2013.01); G06F 11/1666 (2013.01); G11B 20/1883 (2013.01); G11C 16/3495 (2013.01); G11C 29/021 (2013.01); G11C 29/028 (2013.01); G11C 29/42 (2013.01); G11C 29/52 (2013.01); G11C 16/28 (2013.01);
Abstract
A memory system having a flexible read reference is disclosed. The system includes a memory partition, a failcount component, and a controller. The memory partition includes a plurality of memory cells. The failcount component is configured to generate failcounts in response to read operations of the memory partition. The controller is configured to calibrate a reference value for the memory partition by utilizing the failcounts.