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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10319445 B1

PDFFull Text
Expired
Date of Patent:
Jun. 11, 2019

Filed:

Nov. 30, 2017

Programming unprogrammed upper page during lower page programming of multi-level storage cells

Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Bhavadip Solanki, Jungadh, IN;

Anantharaj Thalaimalai Vanaraj, Bengaluru, IN;

Suman Tenugu, Bengaluru, IN;

Arun Thandapani, Bengaluru, IN;

Piyush Anil Dhotre, Bengaluru, IN;

Chittoor Devarajan Sunilkumar, Bengaluru, IN;

Dharmaraju Marenhally Krishna, Bengaluru, IN;

Assignee:

WESTERN DIGITAL TECHNOLOGIES, INC., San Jose, CA (US);

Attorney:

Kunzler Bean & Adamson, PC

Primary Examiner:

Mushfique Siddique

Int. Cl.
CPC ...
G11C 16/10 (2006.01); G11C 16/34 (2006.01); G06F 12/02 (2006.01); G11C 16/04 (2006.01); G11C 11/56 (2006.01); G11C 16/26 (2006.01);
U.S. Cl.
CPC ...
G11C 16/10 (2013.01); G06F 12/0246 (2013.01); G11C 11/5628 (2013.01); G11C 16/0483 (2013.01); G11C 16/26 (2013.01); G11C 16/3459 (2013.01);
Abstract

Apparatuses, systems, methods, and computer program products for programming an unprogrammed upper page based on lower page programming are disclosed. An apparatus includes a non-volatile storage device and a controller. A controller includes a data component that is configured to receive a write request for a first page of a set of multi-level storage cells of a non-volatile storage device. A set of multi-level storage cells includes a first page and a second page. A controller includes a page component that is configured to determine that a write request does not comprise data for at least a portion of a second page of a set of multi-level storage cells. A controller includes a write component that is configured to program at least a portion of a second page of a set of multi-level storage cells with data of a first page of a set of multi-level storage cells.

Find Patent Forward Citations

Solanki, Bhavadip. (2019). Programming unprogrammed upper page during lower page programming of multi-level storage cells (U.S. Patent No. 10319445). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10319445

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