The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2019

Filed:

Oct. 25, 2017
Applicant:

Texas Instruments Incorporated;

Inventors:

Ravikumar Pattipaka, Bangalore, IN;

Raja Sekhar Kanakamedala, Bangalore, IN;

Aravind Miriyala, Bangalore, IN;

Sandeep Kesrimal Oswal, Bangalore, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G10K 11/34 (2006.01); H03K 17/687 (2006.01); H03K 19/003 (2006.01); H03K 3/356 (2006.01); G10K 11/04 (2006.01); G06F 1/3203 (2019.01); H03K 17/08 (2006.01); G11C 11/413 (2006.01); H03K 19/0185 (2006.01); B06B 1/02 (2006.01); H03K 17/56 (2006.01);
U.S. Cl.
CPC ...
G10K 11/341 (2013.01); B06B 1/0207 (2013.01); G06F 1/3203 (2013.01); G10K 11/04 (2013.01); G11C 11/413 (2013.01); H03K 3/356113 (2013.01); H03K 17/08 (2013.01); H03K 17/6871 (2013.01); H03K 19/00361 (2013.01); H03K 19/018507 (2013.01); H03K 17/56 (2013.01); H03K 17/687 (2013.01); H03K 2217/0063 (2013.01);
Abstract

The disclosure provides a level shifter. The level shifter includes a first logic block that receives an input signal and generates a primary pulsed input. A first transistor is coupled to the first logic block and a first node. A gate terminal of the first transistor receives the primary pulsed input. A latch is coupled to the first node and a second node. A second logic block receives the input signal and generates a secondary pulsed input. A second transistor is coupled between the second logic block and the second node. A gate terminal of the second transistor receives the secondary pulsed input.


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