The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2019

Filed:

Dec. 19, 2016
Applicant:

Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;

Inventor:

Richard Clemow, Gerrards Cross, GB;

Assignee:

Cirrus Logic, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04R 1/10 (2006.01); H04R 3/02 (2006.01); G10K 11/16 (2006.01); G10K 11/178 (2006.01);
U.S. Cl.
CPC ...
G10K 11/178 (2013.01); G10K 11/16 (2013.01); H04R 1/1083 (2013.01); H04R 3/02 (2013.01); G10K 2210/1081 (2013.01); G10K 2210/3051 (2013.01); G10K 2210/3217 (2013.01);
Abstract

A digital circuit arrangement for an ambient noise-reduction system affording a higher degree of noise reduction than has hitherto been possible. The arrangement converts the analog signals into N-bit digital signals at sample rate f, and then subjects the converted signals to digital filtering. The value of N in some embodiments is 1 but, in any event, is no greater than 8, and fmay be 64 times the Nyquist sampling rate but, in any event, is substantially greater than the Nyquist sampling rate. This permits digital processing to be used without incurring group delay problems that rule out the use of conventional digital processing in this context. Furthermore, adjustment of the group delay can readily be achieved, in units of a fraction of a micro-second, providing the ability to fine tune the group delay for feed forward applications.


Find Patent Forward Citations

Clemow, Richard. (2019). Digital circuit arrangements for ambient noise-reduction (U.S. Patent No. 10319361). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10319361

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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